pku_cfpNew Contributor2 years agoWhy would a clock path be negative? When I use Quartus Prime's Time Analyzer for violating timing analysis, I find that the clock path in the data required path is negative. This latch clock comes from the tx_clkout of my high-speed tr...Show More
NurinaRegular Contributor2 years agoHi,Any updates? Have you made sure the IP connections are correct?Regards,Nurina
Recent DiscussionsQuesta unable to checkout a viewer licenseSolvedTiming analysis - long combinational pathError(23098) when using IPM_IOPLL on Agliex 7Quartus Prim Pro: "Fatal Error: Segment Violation, Access Violation"Crash at elaboration