Honored Contributorwhy the same path have different clock delay ?
The "Data Arrival Path" and the "Data Required Path" route the same path ,from "PLLREFCLKSELECT_X0_Y7_N0" to "CLKCTRL_G5", but why the time Incr are different ? thanks for your help. https://www.alteraforum.com/forum/attachment.php?attachmentid=7448
Honored ContributorWithin a given timing model(say slow 100) there are two sub-models, a slow and fast sub-model. This accounts for the fact that even if the die is at a given corner, individual paths will vary, which is generally called On-Die Variation. When doing setup analysis on a path, the Data Arrival will use the slow sub-model and Data Required will use the fast. This then flips if you do hold analysis on the exact same path.
But in your case, it's a single clock path, how can it vary? It can't, which is why a thing called Common Clock Path Pessimism Removal will remove this variation. If you scroll further down the Data Required Path, you should see a line-item call pessimisim. It is added to the Data Required Path, which helps timing(makes the slack better), and counteracts this on-die variation modeling on a common clock path. On alterawiki.com there is TimeQuest User Guide I put together that talks about this. (Although it's not a lot more than what I've said here.)Honored ContributorHonored ContributorThe Data Arrival Path is showing the Source Clock Path + Data Path. The Data Required Path is showing the Destination Clock Path. The part shown in the screen-shots is just the clock path portion of each one. (I believe it's an older version of Quartus, as the newer ones have a more clear demarcation in the Data Arrival Path of which part is Clock and which part is Data).
Honored Contributorthank you for your help, Rysc, and I am reading your <TimeQuest User Guide >, it is excellent !!
