Forum Discussion
Mirei
New Contributor
New ContributorWhy is my block "synthesized away"?
I'm an FPGA newbie scratching the surface of all this stuff. Could someone please have a look at the attached project? I had it successfully running with "spi_slave.vhd" as top level entity and th...
Rahul_S_Intel1
Frequent Contributor
Frequent ContributorHi ,
There were some unconnected ports that is the reason for not compiling.
Regards,
Rs
