Why does Quartus put a LE buffer cell in series with the output of an LE cell (adder cell) and the input to the downstream FF? See highlighted element in schematic. Is there a way to disable this?

It would be helpful to see the RTL code for this to figure it out. You can right-click the highlighted cell and select to locate back to the code. Also, is this the RTL Viewer or the Technology Map Viewer (guessing Tech Map Viewer but just want to verify)? And what exactly is that highlighted cell connecting to? It goes off the edge of the screenshot.

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