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Altera_Forum
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11 years ago

*Why* does analysis fail (err 17044) for some qsys + ddr projects?

Dear all, tl;dr: Error (17044) - how to stop those from happening when starting a qsys/nios/ddr3 design from scratch where the qsys part is NOT the top-level entry. I have successfully ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

@Theo,

Did you find out the cause for the error? I get the same error which disappears when I make the .qip file as the top module,

Regards,

Naman