Altera_Forum
Honored Contributor
Honored ContributorWhy AND gate not working?
I'm new to FPGA and using Altera Cyclone 3 Starter Board. I'm trying to turn on Led by using the AND gate with two buttons. Weird things happen, the AND gate acted like the OR gate. The led turned on when I push either two button.
http://www.alteraforum.com/forum/attachment.php?attachmentid=10868&stc=1compiling messages: Warning (20028): Parallel compilation is not licensed and has been disabled Warning (20028): Parallel compilation is not licensed and has been disabled Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature. Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details Critical Warning (332012): Synopsys Design Constraints File file not found: 'led.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Warning (332068): No clocks defined in design. Warning (20028): Parallel compilation is not licensed and has been disabled Critical Warning (332012): Synopsys Design Constraints File file not found: 'led.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Warning (332068): No clocks defined in design. Warning (332068): No clocks defined in design. Warning (332068): No clocks defined in design.
