while loop iteration error

Thanks again FvM!

My serial o/p problem is solved, but i'm still curious as to how i'd go about using a while loop, because i still can't get it to work. I've taken the while loop outside the process statement, and increment index inside. It doesn't complain about max iterations anymore but i can't work out where these errors are coming from:

library IEEE; 
use IEEE.std_logic_1164.all; 
use IEEE.std_logic_unsigned.all; 
 
entity whiler is 
port( clk:in std_logic; 
      reset:in std_logic; 
      outer:out std_logic); 
end whiler; 
 
architecture behavior of whiler is 
variable index : integer := 0; 
begin 
    process 
    begin 
    wait until rising_edge(clk); 
    if (reset = '1') then 
        outer <= '0'; 
    elsif (reset = '0') then 
        index := (index + 1);     
    end if; 
    end process; 
    while index < 6 loop 
            outer <= '1'; 
    end loop; 
end behavior;

Error (10500): VHDL syntax error at whiler.vhd(23) near text "while"; expecting "end", or "(", or an identifier ("while" is a reserved keyword), or a concurrent statement

Error (10500): VHDL syntax error at whiler.vhd(25) near text "loop"; expecting ";", or an identifier ("loop" is a reserved keyword), or "architecture"