To provide a bit more detail, let's compare the tool flow. In both cases, you create the hardware first. With Xilinx you have Vivado which at least provides a visual of what you have created. With Altera, you use Qsys, which I don't care for, but it is at least usable. Personally, I would abolish wizards since they make it difficult to see exactly what you have done.
Given the hardware, the tools now have all the information they need to create the processor system. Xilinx does just that. You just click on "Export to SDK" in Vivado and it creates the hardware C functions inside SDK used to boot the processor(s). The SDK project will have a separate BSP project and then a third one for your user code.
I found a good source is Zynq Geek (a bit out of date, but still easy to follow):
http://zedboard.org/sites/default/files/blogger_importer/08/zedboard-sdk-helloworld-example.html
With Altera, all hell breaks loose. The step that is a single button click on Xilinx is a massive convoluted mess with Altera. The only source I found is the following gibberish:
https://fpgawiki.intel.com/wiki/SoCEDSGettingStarted
I eventually got it working on a Cyclone V. But we planned on using an Arria 10 SoC. Please note the comments "U-Boot compilation is only supported on Linux host PC's". Unbelievable!
For the SoC tools, Altera does not grasp the notion of an example. The FPGA equivalent of the famous C "Hello World" is blinking some LED's and maybe reading a push button. A useful example starts from scratch, creates a simple design, explains what and WHY you do each step. It gives a feel for the tool flow and provides the basis for adding features.
Altera provides a massive turd called the Golden Hardware Reference Design (from rocketboards.org as Tricky said). There is no explanation of how it was created or what it does. Booting a system preinstalled on an SD card IS NOT (I repeat IS NOT) a useful example.
The reason I spent so much time trying to get the Altera SoC tools working is I greatly prefer Quartus to Vivado and the Altera hardware is superior to Xilinx at a lower price. I think it says how bad the Altera tools are that I would switch back to Xilinx SOLELY because of them.
I normally try to be temperate when posting in forums, but the Altera SoC tools really have me going off the deep end. Whoever is in charge of them should be removed from that position. It's pretty clear the tool flow was designed by Unix weenies. I spent the first ten years of my career on Unix. A Unix weenie thinks editing 20 files (preferably undocumented :-) ) and recompiling a driver is a sensible way to add a printer.
Years ago a regional manager told me Altera only reluctantly got into the SoC market and had outsourced it all to Malaysia. This did not seem to jive with the fact that "SoC this and SoC that" is all they blather on about in their news releases. But it does appear they have no interest in fixing their tools.
And the thing that makes it all the more infuriating is all they had to do was copy Xilinx (or even their own NIOS) tool flow.