ContributorCould someone please tell me what is the function of and how to use following pins of the FPGA, as follows picture?
If there exists a document to explain it, could you please share the document?
Thank you very much.
Super ContributorEvery device family has a device handbook that goes into detail on the functions of the I/O. Just search the documentation for your selected device.
Is there something here in particular you want to know about?
ContributorHi sstrell
Thank you, strell, very much. Could you please give me a example or a link about Stratix device? I can't directly find the information like DIFF_n, other PLL, DIFF_OUT, Dedicated clock, and so on in the follows link. Sorry that I really don't know how to use those pins.
Link:
http://www.kontest.ru/datasheet/ALTERA/Stratix%20IV.pdf
Occasional ContributorThe Pin Connection Guideline has the description on every pin in the device.
For Stratix IV: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/stratix4/pcg-01005.pdf
