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Honored Contributor
Honored ContributorWhat PLL ratios are legal
I would like to use a PLL to multiply a clock. I am using Stratix V, Quartus 16.1, have a 50MHz base clock, and would like to run my circuit e.g. at 107894736Hz. So I specified the following on the P...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- You can figure out legal PLL parameters if you understand the PLL structure and requirements for VCO frequency. The :19 divider is a prime, respectively the VCO has to run run either at 107 MHz or 19*107 MHz which is neither possible. An additional restriction is imposed by the minimal PFD input frequency of 5 MHz. --- Quote End --- Many thanks for your reply. In case helps someone else, the constraints that need to be satisfied when using Stratix V are on page 39 of this link https://www.altera.com/en_us/pdfs/literature/hb/stratix-v/stx5_53001.pdf . A diagram those constraints apply to is e.g. here https://www.altera.com/support/support-resources/operation-and-testing/pll-and-clock-management/pll-basics.html
