What is the procedure for using package file in Platform Designer?

Correction: In order to debug the above error, I copied the contents of the vhdl package to the top of each module file. This worked fine after running "Analyze HDL Files".

But when I tried to load all the vhdl files without copying the package info into each module file I got the error quoted above. Screen shot of the error is also included.

Please advise how to use vhdl package files in Package Designer. Thank you!