Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

What is mean of reset assertion and deassertion?

When I read a textbook about FPGA design, it mentions reset assertion and deassertion. But I can't understand what the mean of assertion and deassertion. Anybody can explain them for me? Thanks...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thanks very much, Kevin. You are always helpful!