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Altera_Forum
Honored Contributor
Honored ContributorWay to switch codes by the compilers
Hello, guys. I am in the VHDL, and I am using the Quartus with the ModelSim. I have written a clocker for the simulations; library ieee;
use ieee.std_logic_1164.all;
entity clocker is
...
Altera_ForumHonored Contributor
Honored ContributorThank you reply.
> Like I told you in your previous post... Umm, I will have not understood that exactly... > The usual method is... I had misunderstood that it would not recommend to "call" the "main" module by the other modules, and it is the top-level entity. I can connect in the testbench. Why have not I done that... > PS... I have not known the delta cycle problems. I will watch out, thank you teach me.
