Forum Discussion
Vicky1
Regular Contributor
6 years agoHi Tina,
Please help me by providing below details,
1. which quartus(edition & version) are you using?
2. have you come across any error while simulating including clock signal?
3. provide the simulation screenshot of the result without clock signal
Thanks,
Vikas
TGuo0
New Contributor
6 years agoHello!
- I'm using Quartus II Web Edition 13.0sp1
- The screenshot above is what happens when I include clock signal
- The below is what happens when the clock signal to both latches are the same (so the not gate at the bottom is removed)