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Altera_Forum's avatar
Altera_Forum
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14 years ago

Warning: No paths found for timing analysis

I'm writing a spi module,just a receiver. Few lines,but many warnings. The total logic elements is 0%. Can an get a answer about how to result the problem? Code: module spi (input clk, ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Info: *******************************************************************

Info: Running Quartus II Analysis & Synthesis

Info: Version 9.0 Build 132 02/25/2009 SJ Full Version

Info: Processing started: Sat Jul 30 23:59:01 2011

Info: Command: quartus_map --read_settings_files=on --write_settings_files=off spi -c spi

Info: Found 1 design units, including 1 entities, in source file spi.v

Info: Found entity 1: spi