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Altera_Forum's avatar
Altera_Forum
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14 years ago

Warning: Converted elements in bus name "" using legacy naming rules.

I have a module symbol on my top level block diagram/schematic connected to a few input and output buses. When I compile I always get the the warning "converted elements in bus ... name using legacy...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Same happened to me.

Go to Assignments -> Settings -> Analysis and Synthesis Settings -> More Settings

Go to Block Design Naming and change value from Auto to Quartus II

that solved for me.

[]s