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Altera_Forum's avatar
Altera_Forum
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12 years ago

warning: connected to dangling logic and will be removed

I have the output port width of 12 bits, and the intermediate result is of 14 bit width with the first 3 bits being sign bits (result of 3 addition). I need to remove the first two sign bits (no over...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

That's seem pretty normal. The optimizer removes the logic required to generate the highest 2 bits in order to spare unused resources.

The warning is supposed to make you aware of this, but it won't affect your functional behaviour.