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BDarji's avatar
BDarji
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
Solved

Warning (18390): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on

Dear all, We would like to share something here. We hope it would be helpful someone in future. Quartus Prime Version 19.1.0 Build 240 03/26/2019 Patches 0.02 SJ Pro Edition FPGA Family: Cyclone...
  • BDarji's avatar
    BDarji
    4 years ago

    Hello,

    Thanks again for quick response.

    Here is the conclusion:
    If you are using evaluation license of some IP core being used in Qsys system and if you have disabled part from where that Qsys system is instantiated, you should remove .qsys as well as related .ip files from Quartus project file set to generate programming file.

    Merry Christmas in advance! Enjoy Festive Season!

    Cheers,
    Bhaumik

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

Your work-around is the normal mode of operation. You shouldn't have to ever add the .ip files from a Platform Designer design to your Quartus project. When you create the .qsys file, you have to associate the .qsys to your project .qpf file. That's all you have to do. Everything else is handled for you file-wise in Pro.

  • BDarji's avatar
    BDarji
    Icon for Occasional Contributor rankOccasional Contributor
    4 years ago

    Hello,

    Thank you for your quick response.

    I will try this and share feedback.

    Kind Regards,

    Bhaumik