Forum Discussion
New ContributorWait Statement must contain condition
You're trying to compile in Quartus, which is trying to synthesize the design into hardware, which is the goal of the compiler. If you want to just run simulations, you have to compile and run the sim in a simulation tool, like ModelSim or Questasim.
Super ContributorAn FPGA is not a processor (on its own). You are using commands that may work in a simulation (or a program running on a processor), but these will not turn into hardware in the FPGA. You have to write RTL code to implement the logic function you want to implement on the FPGA. An FPGA "hello world" type of design would be creating a simple adder and running a simulation on it or programming the device and running the design in hardware.
The specific error you are seeing is that "wait" can be used to synthesis hardware if "until" is used along with it. In other words, in hardware, you can't have the possibility of the hardware waiting forever.
But no matter what, this code is not synthesizable into an FPGA.
New ContributorOk if I understood correctly my error comes from the fact that my code would not work on an actual hardware.
I am following this tutorial : https://vhdlwhiz.com/basic-vhdl-tutorials/
And since I don't have any hardware I was just trying to do simulations. From the tutorial the "wait until" doesn't seem to be an issue. Why so? Do I need to do an extra step?
Thank you in advance
- sstrell
You're trying to compile in Quartus, which is trying to synthesize the design into hardware, which is the goal of the compiler. If you want to just run simulations, you have to compile and run the sim in a simulation tool, like ModelSim or Questasim.
- LeaGHallelujah! I understand now, my bad I got mixed up with the softwares. Thank you very much this will help me a lot!
