Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

WADDR, WE, and DATAIN for SYSC_RAM module

I implemented a RAM in a sub-module. RAM values (an array) are filled via an initial block. However, compilation gave me three warnings, that is, "WADDR, WE, and DATAIN" of SYNC_RAM block have no dr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

To make my question clear: let's say my sub-module ROM(addr, out) with the input variable addr being updated in the top-level module continuously from 0~7 then back to 0~7 again. Based on the updated input addr as the clock goes (e.g. addr <= addr + 1), I should have corresponding output, which is the content at updated addr. When my input addr runs from 0~7, how many instances should I have for this ROM on the top-level module, even though I only instantiate module ROM(addr, out) once in the code?