Virtual JTAG counter to TDO

Hi,

I do another test. And with a simple shift register Parallel in serial out, all work correctly.

I have changed a part of my code

I work every positive edge clock. But nothing change.

always @(posedge tck)
begin
	case (ir_in)
		00 :
		begin
			if (v_cdr)
			begin
				dr1_tmp_reg = out_data;
				visual = dr1_tmp_reg;
			end
			else
			begin
				if(v_sdr)
				tdo = dr1_tmp_reg;
				dr1_tmp_reg = {dr1_tmp_reg,dr1_tmp_reg};
			end
		end
	endcase
end

Is the TDO do a first one bit shift before sending information ?