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Altera_Forum
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9 years ago

VHDL Traffic Light - How to make signals viewable in simulation?

Hi there, relatively new to VHDL. At the end of this description I will post my VHDL code and Test Bench. When I simulate the code, the timing seems to be off, I want it to wait 15 clock cycles...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

you click on the sim tab, then the entity where you want to get the signal from. Then you drag the correcsponding signals you want from the objects window onto the wave window.