Is there any reason you're making an asynchronous rom? and not a synchronous one?
btw, heres what I think you want:
architecture sim of my_rom is
type rom_t is array(0 to N-1) of std_logic_vector(7 downto 0);
function init_rom return rom_t is
file rom_file : text open read_mode is filename;
variable ret : rom_t;
variable l : line;
begin
for i in 0 to N-1 loop
readline(rom_file, l);
hread(l, ret(i));
end loop;
return ret;
end function init_rom;
constant ROM : rom_t := init_rom;
begin
process(rd, addr)
begin
if rd='1' then
rddata <= ROM( to_integer( to_unsigned( address ) );
end if;
end process;
end architecture sim;