Altera_ForumHonored Contributor17 years agoVHDL signal assignment with the OTHERS keyword I'm not sure I'm posting this in the right place but I want to assign an unsigned or std_logic_vector to the same type of a larger size. Input is 8 bits wide, outputsignal is 32 bits wide and I wa...Show More
Altera_ForumHonored Contributor17 years agoThere are several options, this is one nexttime <= timecounter + (period & x"000000");
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