Forum Discussion
Altera_Forum
Honored Contributor
11 years agoa few problems here:
assigning count and count2 before the clock means that, in simulation, they will be assigned to 0/2 on every rising or falling edge of the clock unless overridden. So given your code, they may be assigned something on the rising edge, but on the falling edge they are reset back. This is probably different to the behaviour in real hardware as dual edge flip flops are illegal (it might throw an error in compilation) I suggest you do not use variables as you are a beginner. Use only signals. Your if tree does not match the requirement spec. I suggest going back to a peice of paper and start by drawing out the circuit to do the specification. If you dont know the circuit, how do you expect to describe it? VHDL is a Hardware Description Language, not a programming language.