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Altera_Forum
Honored Contributor
10 years agoVHDL JK FlipFlop Error, Please help
Hello. As you can see in the figure 1, We can make a JK flipflop with 2 ANDs and 2 NORs and two internal signals. So I've written a very simple code in ModelSim to make and simulate a JK FlipF...
Altera_Forum
Honored Contributor
10 years agoThere are 2 errors at the above code:
Note that you defined Q correctly as being resulted from I1 and Qp. However, I2 isn't C and Qp and k, but j instead. The same correction must be done to the other signal.