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Altera_Forum's avatar
Altera_Forum
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16 years ago

VHDL IF Statement

hie all

im trying to write an If STATEMENT in VHDL but i get an error i dont understand....Please help:

if( c(2 DOWNTO 0) = "0 1 0") THEN

F(6 DOWNTO 0) = "0 0 0 0 0 1 1";

error i get is:

Error (10500): VHDL syntax error at lab1part4.vhd(29) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement

cheers

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    the format of if is like this:

    if (a)then

    ----

    elsif(b)then

    ----

    else

    ----

    end if;

    so you need an "end if!"
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    ..

    if( c(2 DOWNTO 0) = "0 1 0") THEN

    F(6 DOWNTO 0) = "0 0 0 0 0 1 1";

    ..

    --- Quote End ---

    Adding the end if should give as next error that the "=" for F(6 DOWNTO 0) = "0.." cannot be interpreted as there should be an assignment (F(6 FOWNTO 0) <= "0000011")...

    CU, Carlhermann
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Apart from missing "end if" and wrong assignment syntax, there are probably more VHDL errors.

    - don't use spaces in VHDL constants like "0 1 0",

    - the error message "expecting ... a concurrent statement" suggests, that the statement is misplaced in your code. It's only valid inside a process.

    As a general suggestion, start with a VHDL text book or tutorial.

    Use the language templates in Quartus Editor to check for correct VHDL syntax.