vhdl don't care problem

if you want to include don't care (-) use this code this works....

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.NUMERIC_STD.ALL;

entity enc is

Port ( i_l : in STD_uLOGIC_VECTOR (7 downto 0);

ei_l : in STD_uLOGIC;

a_l : out STD_uLOGIC_VECTOR (2 downto 0);

gs_l,eo_l : out STD_uLOGIC);

end enc;

architecture Behavioral of enc is

begin

process(i_l,ei_l)

begin

if (ei_l='0') then

if std_match(i_l,"0-------") then a_l<="000"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"10------") then a_l<="001"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"110-----") then a_l<="010"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"1110----") then a_l<="011"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"11110---") then a_l<="100"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"111110--") then a_l<="101"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"1111110-") then a_l<="110"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"11111110") then a_l<="111"; gs_l<='0';eo_l<='1';

elsif std_match(i_l,"11111111") then a_l<="111"; gs_l<='1';eo_l<='0';

end if;

else a_l<="111";gs_l<='1';eo_l<='1';

end if;

end process;

end Behavioral;