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Altera_Forum's avatar
Altera_Forum
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13 years ago

vhdl don't care problem

Hello. I am making priority encoder in vhdl and I want to use process, case statement and don't care statement. This is my code and compile is done very well. but in model_sim, the output is alw...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

another way out. don't use don't care.

if (input = "00000001") then binary_out <= "000";

elsif (input(7 downto 1) = "0000001") then binary_out <= "001";

elsif (input(7 downto 2) = "000001") then binary_out <= "010";

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