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Is there an equivalent of the AHDL predefined Altera parameter DEVICE_FAMILY in VHDL? I have a single module to instantiate a Fifo (as I don't like to generate fixed components using the MegaWizard). Now I'm trying to impose the type of block-ram to be used, but e.g. Stratix II has M512, M4k and M-Ram, where e.g Cyclone IV only has M9K. I want to specify the RAM_BLOCK_TYPE using the 'lpm_hint' generic but I then I need to identify the device family at hand.
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You could try "AUTO" as the RAM type and then let Quartus select the "right" RAM for you.
You could add a generic at the top-level called "DEVICE_FAMILY" or "RAM_TYPE" and then pass that down into the design. This is a pain, since you then have to push that generic all the way to the top-level of the design. Another option is to have a configuration package that each design that uses a RAM includes. That VHDL package file would be board specific. Inside this package you can have the constant RAM_TYPE, or multiple names, eg. FIR_COEFFS_RAM_TYPE, RESULTS_RAM_TYPE, etc. Since this package would be included by the components that use RAM, there would be no generics that would have to propagate to the top-level of the design.
There may be Quartus synthesis directives for RAM use that might be available; I have not used any. But if they existed, and allowed you to specify a RAM by its hierarchical path, then at least that would be independent of the VHDL, and would go in the synthesis script for the design.
Cheers,
Dave
Honored Contributor
