I don't know of any tools that can take HDL and turn it into a schematic. Quartus II can perform the opposite conversion though. The RTL viewer view is the closest you'll get to this but like I mentioned before it's just showing you the functional equivalent of how it is actually implemented in the device.
Sometimes I perform HDL to schematic conversions to get a better understanding of the functionality but I do this manually with the assumption that it's just a functional equivalent and it is not really how it would be implemented in any real device (FPGA or ASIC). If this wasn't the case then we wouldn't need synthesis tools and chips would take forever to design as a result. After I complete that then I normally switch back to my usual "how many LUTs wide and deep would this logic be?" mode since I typically optimize my HDL knowing it's going into an FPGA.