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Altera_Forum
Honored Contributor
11 years agoI just found that records with unconstrained elements is not supported in Quartus 14.0...I had high hopes since arrays of unconstraned elements is supported.
In VHDL-2008 record elements can be constrained while defining signals of the type. Hopefully this will be supported soon...
TYPE record_type_t IS RECORD
data : STD_LOGIC_VECTOR;
enable : STD_LOGIC;
END RECORD;
SIGNAL a_record : record_type_t(data(7 DOWNTO 0));
SIGNAL b_record : record_type_t(data(6 DOWNTO 0));