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StefanB's avatar
StefanB
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6 years ago

vhdl 2008: read output / unary operator

Hi Attached you will find a VHDL-file, which implements an FSM and uses the function "next_crc16_d8(..)" to calculate the CRC. The file compiles fine for Questa, but fails in QuartusPrime 18.1 on...
JC_FPGA's avatar
JC_FPGA
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6 years ago

I've also encountered this lack of support for VHDL-2008. I often get my code simulating properly in Questa only to find that a VHDL code construct I used isn't supported by Quartus.

OSVVM and UVVM are getting more traction. Intel should really focus on supporting more the features of VHDL-2008.

Following this thread in case you get a solution...