Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

VHDL- Quartus II (Web Edition) - size of the constante of std_logic_vector type

Hello Everybody,

I would like using different constants of std_logic_vector type like that, because I want to using the numeric value : 


constant VAL_MAX_COMPTEUR_2HZ 	: std_logic_vector(19 downto 0) := To_stdlogicvector(X"000011");

and if I change the size of the std_logic_vector at 21 bit, quartus indicates :

Error (10324): VHDL Expression error at Jongleur_main.vhd(72): expression "('0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','0','1','0','0','0','1')" has 24 elements ; expected 21 elements.

For me that indicates that a constant is not taller than 20bit.

But I don't arrive to find the explanation for that

In advance thank you to the reading and if you have an explanation.

Best Regards,

Amitié - Philippe

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    You are writing a 24 bit constant where a 20 bit constant should be used. 6 hex digits make 24 bit, isn't it? Just delete a leading zero.

    Secondly, why are you not simply writing 

    constant VAL_MAX_COMPTEUR_2HZ 	: std_logic_vector(19 downto 0) := X"00011";

    Finally, if you want numeric values, why don't you use unsigned or integer with range?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hello FvM,

    Thank you very much for your answer - indeed I make a mistake, I mixed the bit number and the hex value... Now I understand why the declaration of my constant didn't work.

    Still a Big Thank you.