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Altera_Forum
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11 years ago

VHDL : Problem with 4-Bit Adder and Subtractor !

Hi I want to make a 4-Bit Adder and Subtractor with VHDL I have created 1-Bit Full-Adder , XOR Gate ( for Subtract ) and a 4-Bit Adder as shown below : Full-Adder : LIBRARY ieee; USE i...
Altera_Forum's avatar
Altera_Forum
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11 years ago

The problem is the inout - because you are not driving it internally the 'U' overrides the '1' driven from outside.

But you should not be using inout anyway - there are no internal tri-states in an FPGA. You should use in and out only.

Plus, your component declaration does not match the entity, as the entity uses an in, and the component uses inout.