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Altera_Forum
Honored Contributor
10 years agoVHDL - (4-bit Adder) Combinational Logic: Hierarchical Design
Hi, I'm new to VHDL and have an issue with a required project and I was hoping someone could help with my code. I'm unable to get my program to compile and not exactly sure what I'm doing wrong. ...
Altera_Forum
Honored Contributor
10 years agoThats because you need the source code for the adder1 component, and it must be compiled before adder4. If you dont have VHDL source, you must use a component, as this tells the VHDL compiler what to expect. With direct instantiation instead of checking the component it uses the entity directly.
As for the assignment, its probably one thats been used for years by an instructor/professor who is still stuck in the 1990s when it comes to technology.