Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

VGA using VHDL

Hi guys. I have problem with my VHDL code. I want to use VGA monitor for my project. Here is the coding for my testing. But, this have error. The error is "Error (10372): VHDL error at vga_test...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

this is because "and" is a logical operation, not an aggregrate operation.

If you really want to do it with an aggregrate operation, you need to write:

(red_reg, green_reg, blue_reg) <= (others => '0');

but whats wrong with 3 separate assignments?

red_reg <= (others => '0');

green_reg <= (others => '0');

blue_reg <= (others => '0');