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Even if Quartus systhesis would support the real data type completety it would not help Bpadalino to do what he wants to. Verilog itself supports only a few operators for the real data type. Definitely no sqrt, exp or ln.
Bpadalino, my recommndation for you: Use a memory module and initialize is with a hex file. Generate the hex file with a simpe C programm that calculates the data. Verilog isn't made for this stuff.
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I wrote said functions in Verilog to have something similar to ieee.math_real, except to be in Verilog. I was quite disappointed when those functions were only useful for simulation.
I really am just trying to avoid using C, Perl, Python, or any other external programming language to complicate matters even more.
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Or use a VHDL component, if you want to have all calculations inside the Quartus project.
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I'd prefer to stay away from mixed-mode HDL, and oftentimes it isn't an option (for me) to mix.
I really wanted to try to be as language agnostic as possible, but it seems I'll stick with VHDL as my language preference. For my purposes, it seems that Verilog is just too limited.
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