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alkhassib's avatar
alkhassib
Icon for New Contributor rankNew Contributor
5 years ago

vcom-1576

The simulation flow progress shows these errors :

# ** Error: Waveform.vwf.vht(32): near "-": (vcom-1576) expecting IS.

# ** Error: C:/intelFPGA_lite/20.1/modelsim_ase/win32aloem/vcom failed.

The code below is from the simulation settings (VHDL):-


onerror {exit -code 1}

vlib work

vcom -work work Lab2-2.vho

vcom -work work Waveform.vwf.vht

vsim -novopt -c -t 1ps -L cyclonev -L altera -L altera_mf -L 220model -L sgate -L altera_lnsim work.Lab2-2_vhd_vec_tst

vcd file -direction Lab2-2.msim.vcd

vcd add -internal Lab2-2_vhd_vec_tst/*

vcd add -internal Lab2-2_vhd_vec_tst/i1/*

proc simTimestamp {} {

echo "Simulation time: $::now ps"

if { [string equal running [runStatus]] } {

after 2500 simTimestamp

}

}

after 2500 simTimestamp

run -all

quit -f



2 Replies

  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    Hi Khassib,


    In your .vhd file, you probably need to look at the line pointed 32. Modelsim is telling that it expects IS probably related to identifier/syntax. Snippet of the code would be helpful here.



  • SyafieqS's avatar
    SyafieqS
    Icon for Super Contributor rankSuper Contributor
    4 years ago

    We do not receive any response from you to the previous reply that I have provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.