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I have compiled my kernel and i know only uses 16% of the M10k memory. Is there way i can use more of it?
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The compiler will use as much resources as required; trying to use more could actually reduce performance since it complicates routing and reduces operating frequency.
M10k blocks are generally used for implementing large local memory buffers and FIFOs. The more local memory you use, the higher the M10k utilization will become.
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Also, i view my report, it says "loop sacrificed fmax to achieve II to 1." But in the optimisation report, it was fine, it says "Pipelined well. Successive iterations are launched every cycle."
Is there way i can avoid that? I wanted to maximize its performance (increase fmax).
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You probably have a loop-carried dependency (feedback) somewhere in your code, forcing the compiler to create a large critical path to achieve an II of one, at the cost of lowered operating frequency.
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Is 121Mhz for cyclone V is good enough? Not much data for me to benchmark
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For Cyclone V, 120 MHz is not too low, but it is also far from high. It is generally not hard to achieve 170-180 MHz on this device. You can try compiling Altera's reference OpenCL examples to see what operating frequency they achieve.