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Altera_Forum's avatar
Altera_Forum
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17 years ago

Using FPGA to map I/Os into address space

Hello All, I am working on a project to implement a simple mapping of several control and status I/Os from various chips into certain address space for a MCU to read/write. I wrote the cod...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

My "gut-feeling" is that the completed sensitivity list "may" not "usually" have effect on synthesis but on simulation, I don't have any explanation why the compiler tool makers have led to this discrepancy...

I -for one- will never go against the "tool rules" because if the Helicopter crash investigators found out(from my fellows ofcourse) I could end up in jail or pay a hefty fine.

self-defense design considerations is vital in saftety critical applications