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As often mentioned, missing signals in sensitivity list are mainly a problem with simulation tools as ModelSim, but don't affect synthesized logic usually.
Cause the combinational process has no other output signal than NS, it's no infering latches to my opinion, it's usual FSM style so far.
As another point, we simply have to assume, that the interface is cooperating correctly with coldfire bus signals, but we can't check it without knowing it's timing and configuaration in detail.
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Hi FvM,
I am used to terms like "usually" or "mainly" in medical books when there is so much doctor's uncertainty. I am sure electronic design wouldn't absorb them.
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