Honored Contributor
Honored ContributorAbot the FSM, isn't even Altera Quartus II handbook suggesting a FSM of two processes?
For my code, yes I got warning saying that I have input signals reading inside a process, but not in my sensitivity list. But it doesn't warn me that latches are used for that reason. Also, if you have something like a maped IO. You could have many many input sigals. Should I include all of them in the sensitivity list? Because it is not necessary to trigger the process whenever any input signal change state. Rather, it's the external MCU read/write should trigger the process.. Thanks for answering --- Quote Start --- Hi, I have always been against the use of anything more than one process for any state machine. Books and tutors may say anything they want but let them come and do the work with deadlines...it is perfectly possible to have just one process FSM so why bother about having excessive code and its problems. If you want to change clk edge then you can just do that separately using a further set of registers. I already notice that your second process is not right, you may get latches, your sensitivity list contains only the state machine(SC) and not all inputs read inside. --- Quote End ---
