Forum Discussion
Altera_Forum
Honored Contributor
10 years agoHi Guys
Thanks for your replies I have checked in the pin planner and the clk pin was indeed routed to pin_M9 I have declared the following constraint in the qsys file set_location_assignment PIN_M9 -to clk set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to clk The code is written in verilog. It is a simple I2C master. However when I tried changing the clock pin to a header pin and I passed an external clock it started working . But it is extremely noisy and hence I still want to use the on board oscillator clock.