This shows a misunderstanding of how FPGAs work. They do not execute code. The VHDL is compiled into a netlist that maps to the existing logic on the FPGA. So you're not defining the program to run on the FPGA, you'er defining the processor that generates outputs based on input. So the logic is working all the time, it is never "run".
To do what you want to do, you would need some kind of comms interface integrated into your VHDL code (say RS232, its fairly easy and there are plenty of examples out there) that you would connect to a source device (say a PC) that would send the values over to your user logic that would respond appropriately to the RS232 input.