User how to communicate with Qsys with PCIe?

Hi Jerry,

regarding synchronization. You can use the RX bars for HOST --> FPGA transfers . When you want to synchronize this transfer to your fpga logic you need a register in your fpga logic (DMA) for synchonization you can use the mSGDMA which can be found in the Altera Wiki, also some pcie designs. Which PCIe Designs did you looked into?

For FPGA to Host transfers you write trough the Txs (Avalon MM Slave) interface to the system memory. You can assign an interrupt to the host.

For this you need the mSGDMA with the respective registers. Just use one of the example designs from Altera or from the Altera Wiki. So the synchronization happens inside the dma and with interrupts!