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Altera_Forum's avatar
Altera_Forum
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12 years ago

Use slow asynchronous modul in a fast synchronous mealy state machine cause timing er

Hello everyone,

how can i use a slow asynchronous modul to calculate signals in one state of a fast synchronous mealy state machine without the Error Timing requirements not met? I tried to use a clock enable signal slow enough for the asynchronous modul to finish but the error still remain.

thanks and regards,

schlittk

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    A clock enable signal doesn't change the requirements for timing closure. If the clock enable signal creates multi-cycle transfers, you have to specify them explicitely.