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Look at what is in your process sensitivity list.
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In synthesized code, it's almost meaningless what's in the sensitívity list of a combinational process, although the compiler issues warnings about missing signals to keep compatibilty with simulation results.
It's the pure logic equations that actually matter.
control_word_register and
latch_counter are assigned in a combinational (or "level sensitive") process, so latches are created. The behaviour is unsafe, because logical combinations of the same signals are generating different latch states. Unavoidable glitches in the generated logic make the latch state possibly unpredictable.
flag_counter and
counter are in contrast assigned in a synchronous (edge-sensitive) process and thus synthesized as clockes DFFs.
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