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NWein's avatar
NWein
Icon for Occasional Contributor rankOccasional Contributor
5 years ago
Solved

Unpredictable Signaltap behavior (QPPro 20.2, Cyclone 10GX)

I'm debugging a Cyclone 10GX design, and we are doing a lot of work with Signaltap. I've been using Signaltap for years and year, and it's always been solid and predictable. Now, however, with my f...
  • sstrell's avatar
    sstrell
    5 years ago

    Is your design meeting timing? If you're failing timing, that could be causing the issue.

    Check that you have selected the correct sampling clock and that it is functioning correctly (if possible).

    Do you have any of the storage qualification features turned on? This could be the cause of missing samples from what you expect.

    If you start the logic analyzer running again from this point (after it ran incorrectly the first time), does it run correctly for subsequent runs? I think you may be saying that subsequent runs do not work correctly until you recompile, but I wanted to clarify.

    Can you show the configuration tab to see the trigger conditions and the configuration settings for the logic analyzer?

NWein's avatar
NWein
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

I've tweaked my timing constraints a bit, and it may or may not be fixed. Results are still inconclusive, but I should have a better idea in the next day or two. I will report back.

Thanks,

Neil

NWein's avatar
NWein
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

It does indeed look like it was timing related in the SignalPath logic. After adjusting my constraints things seem to be working more reliably.

If it starts breaking again I'll report back.

Thanks,

Neil