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Altera_Forum's avatar
Altera_Forum
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14 years ago

Undriven I/O

Hi, On my board, I have a memory connected to FPGA. Currently this memory is used (no logic driving the memory), but the pin assignments are made in QSF and pins declared in top file. Should I ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

Thanks for your response.

I have a question here - though these pins are unused in the sense they dont drive any logic inside or outside the FPGA, their direction is fixed - some pins like WE, CE are outputs, DATA in BiDi and ADDR is again output.

So, the "reserve all unused pins" setting in device setting , will it apply to these type of unused pins?

Am I missing something?

Regards,

Satish